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Cleaned up BMI1/BMI2/AVX2/FMA3/MOVBE/ABM support.

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This commit is contained in:
dev
2015-12-15 05:29:58 +00:00
parent 2c8179f057
commit 0e6e90baf0
4 changed files with 85 additions and 42 deletions
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6
core/java/src/freenet/support/CPUInformation/CPUID.java
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@ -324,7 +324,6 @@ public class CPUID {
System.out.println("\n **More CPUInfo**");
System.out.println("CPU model string: " + c.getCPUModelString());
System.out.println("CPU has MMX: " + c.hasMMX());
System.out.println("CPU has BMI2: " + c.hasBMI2());
System.out.println("CPU has SSE: " + c.hasSSE());
System.out.println("CPU has SSE2: " + c.hasSSE2());
System.out.println("CPU has SSE3: " + c.hasSSE3());
@ -336,6 +335,11 @@ public class CPUID {
System.out.println("CPU has AVX512: " + c.hasAVX512());
System.out.println("CPU has ADX: " + c.hasADX());
System.out.println("CPU has TBM: " + c.hasTBM());
System.out.println("CPU has BMI1: " + c.hasBMI1());
System.out.println("CPU has BMI2: " + c.hasBMI2());
System.out.println("CPU has FMA3: " + c.hasFMA3());
System.out.println("CPU has MOVBE: " + c.hasMOVBE());
System.out.println("CPU has ABM: " + c.hasABM());
if(c instanceof IntelCPUInfo){
System.out.println("\n **Intel-info**");
System.out.println("Is PII-compatible: "+((IntelCPUInfo)c).IsPentium2Compatible());

54
core/java/src/freenet/support/CPUInformation/CPUIDCPUInfo.java
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@ -17,10 +17,6 @@ abstract class CPUIDCPUInfo implements CPUInfo
return (CPUID.getEDXCPUFlags() & (1 << 23)) != 0; //EDX Bit 23
}
public boolean hasBMI2(){
return (CPUID.getExtendedEBXFeatureFlags() & (1 << 8)) != 0; // Extended EBX Bit 8
}
public boolean hasSSE(){
return (CPUID.getEDXCPUFlags() & (1 << 25)) != 0; //EDX Bit 25
}
@ -65,9 +61,9 @@ abstract class CPUIDCPUInfo implements CPUInfo
* @return true iff the CPU supports the AVX2 instruction set.
* @since 0.9.21
*/
public boolean hasAVX2()
{
return (CPUID.getExtendedEBXFeatureFlags() & (1 << 5)) != 0; //Extended EBX Bit 5
public boolean hasAVX2() {
return this.hasABM() &&
(CPUID.getExtendedEBXFeatureFlags() & (1 << 5)) != 0; //Extended EBX Feature Bit 5
}
/**
@ -122,4 +118,48 @@ abstract class CPUIDCPUInfo implements CPUInfo
public boolean hasX64() {
return (CPUID.getExtendedEDXCPUFlags() & (1 << 29)) != 0; //Extended EDX Bit 29
}
/**
* @return true iff the CPU supports the BMI1 instruction set.
* @since 0.9.24
*/
public boolean hasBMI1() {
return this.hasABM() &&
(CPUID.getExtendedEBXFeatureFlags() & (1 << 3)) != 0; // Extended EBX Feature Bit 3
}
/**
* @return true iff the CPU supports the BMI2 instruction set.
* @since 0.9.24
*/
public boolean hasBMI2() {
return this.hasABM() &&
(CPUID.getExtendedEBXFeatureFlags() & (1 << 8)) != 0; // Extended EBX Feature Bit 8
}
/**
* @return true iff the CPU supports the FMA3 instruction set.
* @since 0.9.24
*/
public boolean hasFMA3() {
return (CPUID.getECXCPUFlags() & (1 << 12)) != 0; // ECX Bit 12
}
/**
* @return true iff the CPU supports the MOVBE instruction set.
* @since 0.9.24
*/
public boolean hasMOVBE() {
return (CPUID.getECXCPUFlags() & (1 << 22)) != 0; // ECX Bit 22
}
/**
* @return true iff the CPU supports the ABM instruction set.
* @since 0.9.24
*/
public boolean hasABM() {
return this.hasFMA3() &&
this.hasMOVBE() &&
(CPUID.getExtendedECXCPUFlags() & (1 << 5)) != 0; // Extended EBX Bit 5
}
}

35
core/java/src/freenet/support/CPUInformation/CPUInfo.java
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@ -36,11 +36,6 @@ public interface CPUInfo
*/
public boolean hasMMX();
/**
* @return true iff the CPU supports the BMI2 instruction set.
*/
public boolean hasBMI2();
/**
* @return true iff the CPU supports the SSE instruction set.
*/
@ -125,4 +120,34 @@ public interface CPUInfo
* @since 0.9.21
*/
public boolean hasX64();
/**
* @return true iff the CPU supports the BMI1 instruction set.
* @since 0.9.24
*/
public boolean hasBMI1();
/**
* @return true iff the CPU supports the BMI2 instruction set.
* @since 0.9.24
*/
public boolean hasBMI2();
/**
* @return true iff the CPU supports the FMA3 instruction set.
* @since 0.9.24
*/
public boolean hasFMA3();
/**
* @return true iff the CPU supports the MOVBE instruction set.
* @since 0.9.24
*/
public boolean hasMOVBE();
/**
* @return true iff the CPU supports the ABM instruction set.
* @since 0.9.24
*/
public boolean hasABM();
}

32
core/java/src/freenet/support/CPUInformation/IntelInfoImpl.java
View File

@ -382,34 +382,8 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
case 0x3f:
case 0x45:
case 0x46:
boolean hasNewInstructions = false;
int reg = CPUID.getECXCPUFlags();
boolean hasFMA3 = (reg & (1 << 12)) != 0;
boolean hasMOVBE = (reg & (1 << 22)) != 0;
// AVX is implied by AVX2, so we don't need to check the value here,
// but we will need it below to enable Sandy Bridge if the Haswell checks fail.
// This is the same as hasAVX().
boolean hasAVX = (reg & (1 << 28)) != 0 && (reg & (1 << 27)) != 0;
//System.out.println("FMA3 MOVBE: " +
// hasFMA3 + ' ' + hasMOVBE);
if (hasFMA3 && hasMOVBE) {
reg = CPUID.getExtendedECXCPUFlags();
boolean hasABM = (reg & (1 << 5)) != 0; // aka LZCNT
//System.out.println("FMA3 MOVBE ABM: " +
// hasFMA3 + ' ' + hasMOVBE + ' ' + hasABM);
if (hasABM) {
reg = CPUID.getExtendedEBXFeatureFlags();
boolean hasAVX2 = (reg & (1 << 5)) != 0;
boolean hasBMI1 = (reg & (1 << 3)) != 0;
boolean hasBMI2 = (reg & (1 << 8)) != 0;
//System.out.println("FMA3 MOVBE ABM AVX2 BMI1 BMI2: " +
// hasFMA3 + ' ' + hasMOVBE + ' ' + hasABM + ' ' +
// hasAVX2 + ' ' + hasBMI1 + ' ' + hasBMI2);
if (hasAVX2 && hasBMI1 && hasBMI2)
hasNewInstructions = true;
}
}
if (hasNewInstructions) {
CPUInfo c = CPUID.getInfo();
if (c.hasAVX2() && c.hasBMI1() && c.hasBMI2()) {
isSandyCompatible = true;
isIvyCompatible = true;
isHaswellCompatible = true;
@ -417,7 +391,7 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
} else {
// This processor is "corei" compatible, as we define it,
// i.e. SSE4.2 but not necessarily AVX.
if (hasAVX) {
if (c.hasAVX()) {
isSandyCompatible = true;
isIvyCompatible = true;
modelString = "Haswell Celeron/Pentium w/ AVX model " + model;