forked from I2P_Developers/i2p.i2p
Cleaned up BMI1/BMI2/AVX2/FMA3/MOVBE/ABM support.
This commit is contained in:
@ -324,7 +324,6 @@ public class CPUID {
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System.out.println("\n **More CPUInfo**");
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System.out.println("\n **More CPUInfo**");
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System.out.println("CPU model string: " + c.getCPUModelString());
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System.out.println("CPU model string: " + c.getCPUModelString());
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System.out.println("CPU has MMX: " + c.hasMMX());
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System.out.println("CPU has MMX: " + c.hasMMX());
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System.out.println("CPU has BMI2: " + c.hasBMI2());
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System.out.println("CPU has SSE: " + c.hasSSE());
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System.out.println("CPU has SSE: " + c.hasSSE());
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System.out.println("CPU has SSE2: " + c.hasSSE2());
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System.out.println("CPU has SSE2: " + c.hasSSE2());
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System.out.println("CPU has SSE3: " + c.hasSSE3());
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System.out.println("CPU has SSE3: " + c.hasSSE3());
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@ -336,6 +335,11 @@ public class CPUID {
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System.out.println("CPU has AVX512: " + c.hasAVX512());
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System.out.println("CPU has AVX512: " + c.hasAVX512());
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System.out.println("CPU has ADX: " + c.hasADX());
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System.out.println("CPU has ADX: " + c.hasADX());
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System.out.println("CPU has TBM: " + c.hasTBM());
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System.out.println("CPU has TBM: " + c.hasTBM());
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System.out.println("CPU has BMI1: " + c.hasBMI1());
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System.out.println("CPU has BMI2: " + c.hasBMI2());
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System.out.println("CPU has FMA3: " + c.hasFMA3());
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System.out.println("CPU has MOVBE: " + c.hasMOVBE());
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System.out.println("CPU has ABM: " + c.hasABM());
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if(c instanceof IntelCPUInfo){
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if(c instanceof IntelCPUInfo){
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System.out.println("\n **Intel-info**");
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System.out.println("\n **Intel-info**");
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System.out.println("Is PII-compatible: "+((IntelCPUInfo)c).IsPentium2Compatible());
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System.out.println("Is PII-compatible: "+((IntelCPUInfo)c).IsPentium2Compatible());
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@ -17,10 +17,6 @@ abstract class CPUIDCPUInfo implements CPUInfo
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return (CPUID.getEDXCPUFlags() & (1 << 23)) != 0; //EDX Bit 23
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return (CPUID.getEDXCPUFlags() & (1 << 23)) != 0; //EDX Bit 23
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}
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}
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public boolean hasBMI2(){
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return (CPUID.getExtendedEBXFeatureFlags() & (1 << 8)) != 0; // Extended EBX Bit 8
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}
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public boolean hasSSE(){
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public boolean hasSSE(){
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return (CPUID.getEDXCPUFlags() & (1 << 25)) != 0; //EDX Bit 25
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return (CPUID.getEDXCPUFlags() & (1 << 25)) != 0; //EDX Bit 25
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}
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}
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@ -65,9 +61,9 @@ abstract class CPUIDCPUInfo implements CPUInfo
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* @return true iff the CPU supports the AVX2 instruction set.
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* @return true iff the CPU supports the AVX2 instruction set.
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* @since 0.9.21
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* @since 0.9.21
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*/
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*/
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public boolean hasAVX2()
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public boolean hasAVX2() {
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{
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return this.hasABM() &&
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return (CPUID.getExtendedEBXFeatureFlags() & (1 << 5)) != 0; //Extended EBX Bit 5
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(CPUID.getExtendedEBXFeatureFlags() & (1 << 5)) != 0; //Extended EBX Feature Bit 5
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}
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}
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/**
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/**
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@ -122,4 +118,48 @@ abstract class CPUIDCPUInfo implements CPUInfo
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public boolean hasX64() {
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public boolean hasX64() {
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return (CPUID.getExtendedEDXCPUFlags() & (1 << 29)) != 0; //Extended EDX Bit 29
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return (CPUID.getExtendedEDXCPUFlags() & (1 << 29)) != 0; //Extended EDX Bit 29
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}
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}
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/**
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* @return true iff the CPU supports the BMI1 instruction set.
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* @since 0.9.24
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*/
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public boolean hasBMI1() {
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return this.hasABM() &&
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(CPUID.getExtendedEBXFeatureFlags() & (1 << 3)) != 0; // Extended EBX Feature Bit 3
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}
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/**
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* @return true iff the CPU supports the BMI2 instruction set.
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* @since 0.9.24
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*/
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public boolean hasBMI2() {
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return this.hasABM() &&
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(CPUID.getExtendedEBXFeatureFlags() & (1 << 8)) != 0; // Extended EBX Feature Bit 8
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}
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/**
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* @return true iff the CPU supports the FMA3 instruction set.
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* @since 0.9.24
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*/
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public boolean hasFMA3() {
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return (CPUID.getECXCPUFlags() & (1 << 12)) != 0; // ECX Bit 12
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}
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/**
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* @return true iff the CPU supports the MOVBE instruction set.
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* @since 0.9.24
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*/
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public boolean hasMOVBE() {
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return (CPUID.getECXCPUFlags() & (1 << 22)) != 0; // ECX Bit 22
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}
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/**
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* @return true iff the CPU supports the ABM instruction set.
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* @since 0.9.24
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*/
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public boolean hasABM() {
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return this.hasFMA3() &&
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this.hasMOVBE() &&
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(CPUID.getExtendedECXCPUFlags() & (1 << 5)) != 0; // Extended EBX Bit 5
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}
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}
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}
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@ -36,11 +36,6 @@ public interface CPUInfo
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*/
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*/
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public boolean hasMMX();
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public boolean hasMMX();
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/**
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* @return true iff the CPU supports the BMI2 instruction set.
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*/
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public boolean hasBMI2();
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/**
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/**
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* @return true iff the CPU supports the SSE instruction set.
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* @return true iff the CPU supports the SSE instruction set.
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*/
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*/
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@ -125,4 +120,34 @@ public interface CPUInfo
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* @since 0.9.21
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* @since 0.9.21
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*/
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*/
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public boolean hasX64();
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public boolean hasX64();
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/**
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* @return true iff the CPU supports the BMI1 instruction set.
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* @since 0.9.24
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*/
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public boolean hasBMI1();
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/**
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* @return true iff the CPU supports the BMI2 instruction set.
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* @since 0.9.24
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*/
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public boolean hasBMI2();
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/**
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* @return true iff the CPU supports the FMA3 instruction set.
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* @since 0.9.24
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*/
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public boolean hasFMA3();
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/**
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* @return true iff the CPU supports the MOVBE instruction set.
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* @since 0.9.24
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*/
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public boolean hasMOVBE();
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/**
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* @return true iff the CPU supports the ABM instruction set.
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* @since 0.9.24
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*/
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public boolean hasABM();
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}
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}
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@ -382,34 +382,8 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
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case 0x3f:
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case 0x3f:
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case 0x45:
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case 0x45:
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case 0x46:
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case 0x46:
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boolean hasNewInstructions = false;
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CPUInfo c = CPUID.getInfo();
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int reg = CPUID.getECXCPUFlags();
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if (c.hasAVX2() && c.hasBMI1() && c.hasBMI2()) {
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boolean hasFMA3 = (reg & (1 << 12)) != 0;
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boolean hasMOVBE = (reg & (1 << 22)) != 0;
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// AVX is implied by AVX2, so we don't need to check the value here,
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// but we will need it below to enable Sandy Bridge if the Haswell checks fail.
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// This is the same as hasAVX().
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boolean hasAVX = (reg & (1 << 28)) != 0 && (reg & (1 << 27)) != 0;
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//System.out.println("FMA3 MOVBE: " +
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// hasFMA3 + ' ' + hasMOVBE);
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if (hasFMA3 && hasMOVBE) {
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reg = CPUID.getExtendedECXCPUFlags();
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boolean hasABM = (reg & (1 << 5)) != 0; // aka LZCNT
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//System.out.println("FMA3 MOVBE ABM: " +
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// hasFMA3 + ' ' + hasMOVBE + ' ' + hasABM);
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if (hasABM) {
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reg = CPUID.getExtendedEBXFeatureFlags();
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boolean hasAVX2 = (reg & (1 << 5)) != 0;
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boolean hasBMI1 = (reg & (1 << 3)) != 0;
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boolean hasBMI2 = (reg & (1 << 8)) != 0;
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//System.out.println("FMA3 MOVBE ABM AVX2 BMI1 BMI2: " +
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// hasFMA3 + ' ' + hasMOVBE + ' ' + hasABM + ' ' +
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// hasAVX2 + ' ' + hasBMI1 + ' ' + hasBMI2);
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if (hasAVX2 && hasBMI1 && hasBMI2)
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hasNewInstructions = true;
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}
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}
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if (hasNewInstructions) {
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isSandyCompatible = true;
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isSandyCompatible = true;
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isIvyCompatible = true;
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isIvyCompatible = true;
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isHaswellCompatible = true;
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isHaswellCompatible = true;
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@ -417,7 +391,7 @@ class IntelInfoImpl extends CPUIDCPUInfo implements IntelCPUInfo
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} else {
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} else {
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// This processor is "corei" compatible, as we define it,
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// This processor is "corei" compatible, as we define it,
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// i.e. SSE4.2 but not necessarily AVX.
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// i.e. SSE4.2 but not necessarily AVX.
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if (hasAVX) {
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if (c.hasAVX()) {
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isSandyCompatible = true;
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isSandyCompatible = true;
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isIvyCompatible = true;
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isIvyCompatible = true;
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modelString = "Haswell Celeron/Pentium w/ AVX model " + model;
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modelString = "Haswell Celeron/Pentium w/ AVX model " + model;
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